annotate m-toolbox/sltpda/test/testattachmdl.mdl @ 46:ca0b8d4dcdb6 database-connection-manager

Fix
author Daniele Nicolodi <nicolodi@science.unitn.it>
date Tue, 06 Dec 2011 19:07:27 +0100
parents f0afece42f48
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
0
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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1 Model {
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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2 Name "testattachmdl"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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3 Version 6.6
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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4 MdlSubVersion 0
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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5 GraphicalInterface {
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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6 NumRootInports 0
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Daniele Nicolodi <nicolodi@science.unitn.it>
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7 NumRootOutports 0
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Daniele Nicolodi <nicolodi@science.unitn.it>
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8 ParameterArgumentNames ""
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Daniele Nicolodi <nicolodi@science.unitn.it>
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9 ComputedModelVersion "1.4"
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Daniele Nicolodi <nicolodi@science.unitn.it>
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10 NumModelReferences 0
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Daniele Nicolodi <nicolodi@science.unitn.it>
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11 NumTestPointedSignals 0
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Daniele Nicolodi <nicolodi@science.unitn.it>
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12 }
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Daniele Nicolodi <nicolodi@science.unitn.it>
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13 SavedCharacterEncoding "ISO-8859-1"
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Daniele Nicolodi <nicolodi@science.unitn.it>
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14 SaveDefaultBlockParams on
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Daniele Nicolodi <nicolodi@science.unitn.it>
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15 SampleTimeColors off
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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16 LibraryLinkDisplay "none"
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Daniele Nicolodi <nicolodi@science.unitn.it>
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17 WideLines off
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Daniele Nicolodi <nicolodi@science.unitn.it>
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18 ShowLineDimensions off
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Daniele Nicolodi <nicolodi@science.unitn.it>
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19 ShowPortDataTypes off
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Daniele Nicolodi <nicolodi@science.unitn.it>
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20 ShowLoopsOnError on
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Daniele Nicolodi <nicolodi@science.unitn.it>
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21 IgnoreBidirectionalLines off
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Daniele Nicolodi <nicolodi@science.unitn.it>
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22 ShowStorageClass off
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Daniele Nicolodi <nicolodi@science.unitn.it>
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23 ShowTestPointIcons on
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Daniele Nicolodi <nicolodi@science.unitn.it>
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24 ShowViewerIcons on
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Daniele Nicolodi <nicolodi@science.unitn.it>
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25 SortedOrder off
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Daniele Nicolodi <nicolodi@science.unitn.it>
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26 ExecutionContextIcon off
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Daniele Nicolodi <nicolodi@science.unitn.it>
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27 ShowLinearizationAnnotations on
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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28 ScopeRefreshTime 0.035000
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Daniele Nicolodi <nicolodi@science.unitn.it>
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29 OverrideScopeRefreshTime on
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Daniele Nicolodi <nicolodi@science.unitn.it>
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30 DisableAllScopes off
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Daniele Nicolodi <nicolodi@science.unitn.it>
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31 DataTypeOverride "UseLocalSettings"
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Daniele Nicolodi <nicolodi@science.unitn.it>
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32 MinMaxOverflowLogging "UseLocalSettings"
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Daniele Nicolodi <nicolodi@science.unitn.it>
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33 MinMaxOverflowArchiveMode "Overwrite"
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Daniele Nicolodi <nicolodi@science.unitn.it>
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34 BlockNameDataTip off
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Daniele Nicolodi <nicolodi@science.unitn.it>
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35 BlockParametersDataTip off
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Daniele Nicolodi <nicolodi@science.unitn.it>
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36 BlockDescriptionStringDataTip off
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Daniele Nicolodi <nicolodi@science.unitn.it>
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37 ToolBar on
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Daniele Nicolodi <nicolodi@science.unitn.it>
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38 StatusBar on
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Daniele Nicolodi <nicolodi@science.unitn.it>
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39 BrowserShowLibraryLinks off
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Daniele Nicolodi <nicolodi@science.unitn.it>
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40 BrowserLookUnderMasks off
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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41 Created "Sat Mar 31 19:42:18 2007"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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42 Creator "hewitson"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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43 UpdateHistory "UpdateHistoryNever"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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44 ModifiedByFormat "%<Auto>"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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45 LastModifiedBy "hewitson"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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46 ModifiedDateFormat "%<Auto>"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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47 LastModifiedDate "Sat Mar 31 20:12:22 2007"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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48 ModelVersionFormat "1.%<AutoIncrement:4>"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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49 ConfigurationManager "cvs"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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50 SimulationMode "normal"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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51 LinearizationMsg "none"
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Daniele Nicolodi <nicolodi@science.unitn.it>
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52 Profile off
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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53 ParamWorkspaceSource "MATLABWorkspace"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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54 AccelSystemTargetFile "accel.tlc"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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55 AccelTemplateMakefile "accel_default_tmf"
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Daniele Nicolodi <nicolodi@science.unitn.it>
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56 AccelMakeCommand "make_rtw"
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Daniele Nicolodi <nicolodi@science.unitn.it>
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57 AccelVerboseBuild off
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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58 TryForcingSFcnDF off
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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59 RecordCoverage off
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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60 CovPath "/"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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61 CovSaveName "covdata"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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62 CovMetricSettings "dw"
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Daniele Nicolodi <nicolodi@science.unitn.it>
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63 CovNameIncrementing off
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Daniele Nicolodi <nicolodi@science.unitn.it>
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64 CovHtmlReporting on
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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65 covSaveCumulativeToWorkspaceVar on
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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66 CovSaveSingleToWorkspaceVar on
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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67 CovCumulativeVarName "covCumulativeData"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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68 CovCumulativeReport off
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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69 CovReportOnPause on
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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70 ExtModeBatchMode off
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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71 ExtModeEnableFloating on
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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72 ExtModeTrigType "manual"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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73 ExtModeTrigMode "normal"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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74 ExtModeTrigPort "1"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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75 ExtModeTrigElement "any"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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76 ExtModeTrigDuration 1000
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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77 ExtModeTrigDurationFloating "auto"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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78 ExtModeTrigHoldOff 0
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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79 ExtModeTrigDelay 0
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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80 ExtModeTrigDirection "rising"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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81 ExtModeTrigLevel 0
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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82 ExtModeArchiveMode "off"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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83 ExtModeAutoIncOneShot off
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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84 ExtModeIncDirWhenArm off
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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85 ExtModeAddSuffixToVar off
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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86 ExtModeWriteAllDataToWs off
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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87 ExtModeArmWhenConnect on
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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88 ExtModeSkipDownloadWhenConnect off
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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89 ExtModeLogAll on
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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90 ExtModeAutoUpdateStatusClock off
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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91 BufferReuse on
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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92 ProdHWDeviceType "32-bit Generic"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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93 ShowModelReferenceBlockVersion off
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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94 ShowModelReferenceBlockIO off
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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95 Array {
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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96 Type "Handle"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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97 Dimension 1
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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98 Simulink.ConfigSet {
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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99 $ObjectID 1
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
100 Version "1.2.0"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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101 Array {
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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102 Type "Handle"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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103 Dimension 7
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
104 Simulink.SolverCC {
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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105 $ObjectID 2
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
106 Version "1.2.0"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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107 StartTime "0.0"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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108 StopTime "10.0"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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109 AbsTol "auto"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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110 FixedStep "auto"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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111 InitialStep "auto"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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112 MaxNumMinSteps "-1"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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113 MaxOrder 5
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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114 ConsecutiveZCsStepRelTol "10*128*eps"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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115 MaxConsecutiveZCs "1000"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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116 ExtrapolationOrder 4
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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117 NumberNewtonIterations 1
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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118 MaxStep "auto"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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119 MinStep "auto"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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120 MaxConsecutiveMinStep "1"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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121 RelTol "1e-3"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
122 SolverMode "Auto"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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123 Solver "ode45"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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124 SolverName "ode45"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
125 ZeroCrossControl "UseLocalSettings"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
126 AlgebraicLoopSolver "TrustRegion"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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127 SolverResetMethod "Fast"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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128 PositivePriorityOrder off
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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129 AutoInsertRateTranBlk off
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
130 SampleTimeConstraint "Unconstrained"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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131 RateTranMode "Deterministic"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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132 }
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
133 Simulink.DataIOCC {
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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134 $ObjectID 3
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
135 Version "1.2.0"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
136 Decimation "1"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
137 ExternalInput "[t, u]"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
138 FinalStateName "xFinal"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
139 InitialState "xInitial"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
140 LimitDataPoints on
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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141 MaxDataPoints "1000"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
142 LoadExternalInput off
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
143 LoadInitialState off
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
144 SaveFinalState off
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
145 SaveFormat "Array"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
146 SaveOutput on
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
147 SaveState off
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
148 SignalLogging on
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
149 InspectSignalLogs off
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
150 SaveTime on
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
151 StateSaveName "xout"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
152 TimeSaveName "tout"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
153 OutputSaveName "yout"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
154 SignalLoggingName "logsout"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
155 OutputOption "RefineOutputTimes"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
156 OutputTimes "[]"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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157 Refine "1"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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158 }
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
159 Simulink.OptimizationCC {
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
160 $ObjectID 4
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
161 Array {
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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162 Type "Cell"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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163 Dimension 5
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
164 Cell "ZeroExternalMemoryAtStartup"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
165 Cell "ZeroInternalMemoryAtStartup"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
166 Cell "InitFltsAndDblsToZero"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
167 Cell "OptimizeModelRefInitCode"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
168 Cell "NoFixptDivByZeroProtection"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
169 PropName "DisabledProps"
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Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
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170 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
171 Version "1.2.0"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
172 BlockReduction on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
173 BooleanDataType on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
174 ConditionallyExecuteInputs on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
175 InlineParams off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
176 InlineInvariantSignals off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
177 OptimizeBlockIOStorage on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
178 BufferReuse on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
179 EnforceIntegerDowncast on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
180 ExpressionFolding on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
181 ExpressionDepthLimit 2147483647
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
182 FoldNonRolledExpr on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
183 LocalBlockOutputs on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
184 RollThreshold 5
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
185 SystemCodeInlineAuto off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
186 StateBitsets off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
187 DataBitsets off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
188 UseTempVars off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
189 ZeroExternalMemoryAtStartup on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
190 ZeroInternalMemoryAtStartup on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
191 InitFltsAndDblsToZero on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
192 NoFixptDivByZeroProtection off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
193 EfficientFloat2IntCast off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
194 OptimizeModelRefInitCode off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
195 LifeSpan "inf"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
196 BufferReusableBoundary on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
197 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
198 Simulink.DebuggingCC {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
199 $ObjectID 5
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
200 Version "1.2.0"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
201 RTPrefix "error"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
202 ConsistencyChecking "none"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
203 ArrayBoundsChecking "none"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
204 SignalInfNanChecking "none"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
205 ReadBeforeWriteMsg "UseLocalSettings"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
206 WriteAfterWriteMsg "UseLocalSettings"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
207 WriteAfterReadMsg "UseLocalSettings"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
208 AlgebraicLoopMsg "warning"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
209 ArtificialAlgebraicLoopMsg "warning"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
210 CheckSSInitialOutputMsg on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
211 CheckExecutionContextPreStartOutputMsg off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
212 CheckExecutionContextRuntimeOutputMsg off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
213 SignalResolutionControl "UseLocalSettings"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
214 BlockPriorityViolationMsg "warning"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
215 MinStepSizeMsg "warning"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
216 TimeAdjustmentMsg "none"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
217 MaxConsecutiveZCsMsg "error"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
218 SolverPrmCheckMsg "warning"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
219 InheritedTsInSrcMsg "warning"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
220 DiscreteInheritContinuousMsg "warning"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
221 MultiTaskDSMMsg "error"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
222 MultiTaskCondExecSysMsg "error"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
223 MultiTaskRateTransMsg "error"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
224 SingleTaskRateTransMsg "none"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
225 TasksWithSamePriorityMsg "warning"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
226 SigSpecEnsureSampleTimeMsg "warning"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
227 CheckMatrixSingularityMsg "none"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
228 IntegerOverflowMsg "warning"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
229 Int32ToFloatConvMsg "warning"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
230 ParameterDowncastMsg "error"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
231 ParameterOverflowMsg "error"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
232 ParameterUnderflowMsg "none"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
233 ParameterPrecisionLossMsg "warning"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
234 ParameterTunabilityLossMsg "warning"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
235 UnderSpecifiedDataTypeMsg "none"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
236 UnnecessaryDatatypeConvMsg "none"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
237 VectorMatrixConversionMsg "none"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
238 InvalidFcnCallConnMsg "error"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
239 FcnCallInpInsideContextMsg "Use local settings"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
240 SignalLabelMismatchMsg "none"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
241 UnconnectedInputMsg "warning"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
242 UnconnectedOutputMsg "warning"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
243 UnconnectedLineMsg "warning"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
244 SFcnCompatibilityMsg "none"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
245 UniqueDataStoreMsg "none"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
246 BusObjectLabelMismatch "warning"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
247 RootOutportRequireBusObject "warning"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
248 AssertControl "UseLocalSettings"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
249 EnableOverflowDetection off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
250 ModelReferenceIOMsg "none"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
251 ModelReferenceVersionMismatchMessage "none"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
252 ModelReferenceIOMismatchMessage "none"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
253 ModelReferenceCSMismatchMessage "none"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
254 ModelReferenceSimTargetVerbose off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
255 UnknownTsInhSupMsg "warning"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
256 ModelReferenceDataLoggingMessage "warning"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
257 ModelReferenceSymbolNameMessage "warning"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
258 ModelReferenceExtraNoncontSigs "error"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
259 StateNameClashWarn "warning"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
260 StrictBusMsg "Warning"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
261 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
262 Simulink.HardwareCC {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
263 $ObjectID 6
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
264 Version "1.2.0"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
265 ProdBitPerChar 8
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
266 ProdBitPerShort 16
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
267 ProdBitPerInt 32
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
268 ProdBitPerLong 32
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
269 ProdIntDivRoundTo "Undefined"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
270 ProdEndianess "Unspecified"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
271 ProdWordSize 32
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
272 ProdShiftRightIntArith on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
273 ProdHWDeviceType "32-bit Generic"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
274 TargetBitPerChar 8
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
275 TargetBitPerShort 16
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
276 TargetBitPerInt 32
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
277 TargetBitPerLong 32
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
278 TargetShiftRightIntArith on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
279 TargetIntDivRoundTo "Undefined"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
280 TargetEndianess "Unspecified"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
281 TargetWordSize 32
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
282 TargetTypeEmulationWarnSuppressLevel 0
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
283 TargetPreprocMaxBitsSint 32
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
284 TargetPreprocMaxBitsUint 32
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
285 TargetHWDeviceType "Specified"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
286 TargetUnknown off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
287 ProdEqTarget on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
288 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
289 Simulink.ModelReferenceCC {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
290 $ObjectID 7
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
291 Version "1.2.0"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
292 UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
293 CheckModelReferenceTargetMessage "error"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
294 ModelReferenceNumInstancesAllowed "Multi"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
295 ModelReferencePassRootInputsByReference on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
296 ModelReferenceMinAlgLoopOccurrences off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
297 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
298 Simulink.RTWCC {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
299 $BackupClass "Simulink.RTWCC"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
300 $ObjectID 8
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
301 Array {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
302 Type "Cell"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
303 Dimension 1
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
304 Cell "IncludeHyperlinkInReport"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
305 PropName "DisabledProps"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
306 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
307 Version "1.2.0"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
308 SystemTargetFile "grt.tlc"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
309 GenCodeOnly off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
310 MakeCommand "make_rtw"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
311 GenerateMakefile on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
312 TemplateMakefile "grt_default_tmf"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
313 GenerateReport off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
314 SaveLog off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
315 RTWVerbose on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
316 RetainRTWFile off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
317 ProfileTLC off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
318 TLCDebug off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
319 TLCCoverage off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
320 TLCAssert off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
321 ProcessScriptMode "Default"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
322 ConfigurationMode "Optimized"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
323 ConfigAtBuild off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
324 IncludeHyperlinkInReport off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
325 LaunchReport off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
326 TargetLang "C"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
327 IncludeBusHierarchyInRTWFileBlockHierarchyMap off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
328 IncludeERTFirstTime off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
329 Array {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
330 Type "Handle"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
331 Dimension 2
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
332 Simulink.CodeAppCC {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
333 $ObjectID 9
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
334 Array {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
335 Type "Cell"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
336 Dimension 16
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
337 Cell "IgnoreCustomStorageClasses"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
338 Cell "InsertBlockDesc"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
339 Cell "SFDataObjDesc"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
340 Cell "SimulinkDataObjDesc"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
341 Cell "DefineNamingRule"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
342 Cell "SignalNamingRule"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
343 Cell "ParamNamingRule"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
344 Cell "InlinedPrmAccess"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
345 Cell "CustomSymbolStr"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
346 Cell "CustomSymbolStrGlobalVar"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
347 Cell "CustomSymbolStrType"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
348 Cell "CustomSymbolStrField"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
349 Cell "CustomSymbolStrFcn"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
350 Cell "CustomSymbolStrBlkIO"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
351 Cell "CustomSymbolStrTmpVar"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
352 Cell "CustomSymbolStrMacro"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
353 PropName "DisabledProps"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
354 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
355 Version "1.2.0"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
356 ForceParamTrailComments off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
357 GenerateComments on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
358 IgnoreCustomStorageClasses on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
359 IncHierarchyInIds off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
360 MaxIdLength 31
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
361 PreserveName off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
362 PreserveNameWithParent off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
363 ShowEliminatedStatement off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
364 IncAutoGenComments off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
365 SimulinkDataObjDesc off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
366 SFDataObjDesc off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
367 IncDataTypeInIds off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
368 PrefixModelToSubsysFcnNames on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
369 MangleLength 1
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
370 CustomSymbolStrGlobalVar "$R$N$M"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
371 CustomSymbolStrType "$N$R$M"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
372 CustomSymbolStrField "$N$M"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
373 CustomSymbolStrFcn "$R$N$M$F"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
374 CustomSymbolStrBlkIO "rtb_$N$M"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
375 CustomSymbolStrTmpVar "$N$M"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
376 CustomSymbolStrMacro "$R$N$M"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
377 DefineNamingRule "None"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
378 ParamNamingRule "None"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
379 SignalNamingRule "None"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
380 InsertBlockDesc off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
381 SimulinkBlockComments on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
382 EnableCustomComments off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
383 InlinedPrmAccess "Literals"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
384 ReqsInCode off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
385 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
386 Simulink.GRTTargetCC {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
387 $BackupClass "Simulink.TargetCC"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
388 $ObjectID 10
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
389 Array {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
390 Type "Cell"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
391 Dimension 15
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
392 Cell "IncludeMdlTerminateFcn"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
393 Cell "CombineOutputUpdateFcns"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
394 Cell "SuppressErrorStatus"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
395 Cell "ERTCustomFileBanners"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
396 Cell "GenerateSampleERTMain"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
397 Cell "GenerateTestInterfaces"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
398 Cell "ModelStepFunctionPrototypeControlComp"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
399 "liant"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
400 Cell "MultiInstanceERTCode"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
401 Cell "PurelyIntegerCode"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
402 Cell "SupportNonFinite"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
403 Cell "SupportComplex"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
404 Cell "SupportAbsoluteTime"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
405 Cell "SupportContinuousTime"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
406 Cell "SupportNonInlinedSFcns"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
407 Cell "PortableWordSizes"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
408 PropName "DisabledProps"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
409 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
410 Version "1.2.0"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
411 TargetFcnLib "ansi_tfl_tmw.mat"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
412 TargetLibSuffix ""
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
413 TargetPreCompLibLocation ""
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
414 GenFloatMathFcnCalls "ANSI_C"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
415 UtilityFuncGeneration "Auto"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
416 GenerateFullHeader on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
417 GenerateSampleERTMain off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
418 GenerateTestInterfaces off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
419 IsPILTarget off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
420 ModelReferenceCompliant on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
421 IncludeMdlTerminateFcn on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
422 CombineOutputUpdateFcns off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
423 SuppressErrorStatus off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
424 IncludeFileDelimiter "Auto"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
425 ERTCustomFileBanners off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
426 SupportAbsoluteTime on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
427 LogVarNameModifier "rt_"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
428 MatFileLogging on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
429 MultiInstanceERTCode off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
430 SupportNonFinite on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
431 SupportComplex on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
432 PurelyIntegerCode off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
433 SupportContinuousTime on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
434 SupportNonInlinedSFcns on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
435 EnableShiftOperators on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
436 ParenthesesLevel "Nominal"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
437 PortableWordSizes off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
438 ModelStepFunctionPrototypeControlCompliant off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
439 ExtMode off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
440 ExtModeStaticAlloc off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
441 ExtModeTesting off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
442 ExtModeStaticAllocSize 1000000
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
443 ExtModeTransport 0
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
444 ExtModeMexFile "ext_comm"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
445 RTWCAPISignals off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
446 RTWCAPIParams off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
447 RTWCAPIStates off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
448 GenerateASAP2 off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
449 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
450 PropName "Components"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
451 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
452 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
453 PropName "Components"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
454 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
455 Name "Configuration"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
456 CurrentDlgPage "Solver"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
457 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
458 PropName "ConfigurationSets"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
459 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
460 Simulink.ConfigSet {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
461 $PropName "ActiveConfigurationSet"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
462 $ObjectID 1
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
463 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
464 BlockDefaults {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
465 Orientation "right"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
466 ForegroundColor "black"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
467 BackgroundColor "white"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
468 DropShadow off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
469 NamePlacement "normal"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
470 FontName "Helvetica"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
471 FontSize 10
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
472 FontWeight "normal"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
473 FontAngle "normal"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
474 ShowName on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
475 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
476 BlockParameterDefaults {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
477 Block {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
478 BlockType Inport
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
479 Port "1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
480 UseBusObject off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
481 BusObject "BusObject"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
482 BusOutputAsStruct off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
483 PortDimensions "-1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
484 SampleTime "-1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
485 DataType "auto"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
486 OutDataType "sfix(16)"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
487 OutScaling "2^0"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
488 SignalType "auto"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
489 SamplingMode "auto"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
490 LatchByDelayingOutsideSignal off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
491 LatchByCopyingInsideSignal off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
492 Interpolate on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
493 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
494 Block {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
495 BlockType Outport
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
496 Port "1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
497 UseBusObject off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
498 BusObject "BusObject"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
499 BusOutputAsStruct off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
500 PortDimensions "-1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
501 SampleTime "-1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
502 DataType "auto"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
503 OutDataType "sfix(16)"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
504 OutScaling "2^0"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
505 SignalType "auto"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
506 SamplingMode "auto"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
507 OutputWhenDisabled "held"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
508 InitialOutput "[]"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
509 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
510 Block {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
511 BlockType SubSystem
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
512 ShowPortLabels "FromPortIcon"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
513 Permissions "ReadWrite"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
514 PermitHierarchicalResolution "All"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
515 TreatAsAtomicUnit off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
516 SystemSampleTime "-1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
517 RTWFcnNameOpts "Auto"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
518 RTWFileNameOpts "Auto"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
519 RTWMemSecFuncInitTerm "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
520 RTWMemSecFuncExecute "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
521 RTWMemSecDataConstants "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
522 RTWMemSecDataInternal "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
523 RTWMemSecDataParameters "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
524 SimViewingDevice off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
525 DataTypeOverride "UseLocalSettings"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
526 MinMaxOverflowLogging "UseLocalSettings"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
527 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
528 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
529 AnnotationDefaults {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
530 HorizontalAlignment "center"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
531 VerticalAlignment "middle"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
532 ForegroundColor "black"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
533 BackgroundColor "white"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
534 DropShadow off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
535 FontName "Helvetica"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
536 FontSize 10
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
537 FontWeight "normal"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
538 FontAngle "normal"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
539 UseDisplayTextAsClickCallback off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
540 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
541 LineDefaults {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
542 FontName "Helvetica"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
543 FontSize 9
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
544 FontWeight "normal"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
545 FontAngle "normal"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
546 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
547 System {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
548 Name "testattachmdl"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
549 Location [70, 200, 691, 617]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
550 Open on
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
551 ModelBrowserVisibility off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
552 ModelBrowserWidth 200
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
553 ScreenColor "white"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
554 PaperOrientation "landscape"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
555 PaperPositionMode "auto"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
556 PaperType "A4"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
557 PaperUnits "inches"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
558 TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
559 TiledPageScale 1
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
560 ShowPageBoundaries off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
561 ZoomFactor "100"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
562 ReportName "simulink-default.rpt"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
563 Block {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
564 BlockType Reference
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
565 Name "attach model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
566 Tag "attachdmdl"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
567 Ports [1, 1]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
568 Position [195, 75, 255, 115]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
569 AttributesFormatString "%<Tag>"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
570 SourceBlock "sltpda/AO class/attach model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
571 SourceType "attachmdl"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
572 ShowPortLabels "FromPortIcon"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
573 SystemSampleTime "-1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
574 FunctionWithSeparateData off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
575 RTWMemSecFuncInitTerm "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
576 RTWMemSecFuncExecute "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
577 RTWMemSecDataConstants "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
578 RTWMemSecDataInternal "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
579 RTWMemSecDataParameters "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
580 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
581 Block {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
582 BlockType Reference
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
583 Name "data1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
584 Tag "ao"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
585 Description "Creates an Analysis object from a file."
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
586 Ports [0, 1]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
587 Position [90, 188, 140, 222]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
588 AttributesFormatString "%<Tag>"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
589 SourceBlock "sltpda/AO class/ao1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
590 SourceType "ao"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
591 ShowPortLabels "FromPortIcon"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
592 SystemSampleTime "-1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
593 FunctionWithSeparateData off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
594 RTWMemSecFuncInitTerm "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
595 RTWMemSecFuncExecute "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
596 RTWMemSecDataConstants "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
597 RTWMemSecDataInternal "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
598 RTWMemSecDataParameters "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
599 fname "/Users/hewitson/working/ltp/ltpda/software/m-to"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
600 "olbox/sltpda/testout.xml"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
601 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
602 Block {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
603 BlockType Reference
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
604 Name "data2"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
605 Tag "ao"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
606 Description "Creates an Analysis object from a file."
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
607 Ports [0, 1]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
608 Position [90, 78, 140, 112]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
609 AttributesFormatString "%<Tag>"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
610 SourceBlock "sltpda/AO class/ao1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
611 SourceType "ao"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
612 ShowPortLabels "FromPortIcon"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
613 SystemSampleTime "-1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
614 FunctionWithSeparateData off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
615 RTWMemSecFuncInitTerm "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
616 RTWMemSecFuncExecute "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
617 RTWMemSecDataConstants "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
618 RTWMemSecDataInternal "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
619 RTWMemSecDataParameters "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
620 fname "/Users/hewitson/working/ltp/ltpda/software/m-to"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
621 "olbox/sltpda/test/data2.txt"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
622 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
623 Block {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
624 BlockType Reference
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
625 Name "display"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
626 Tag "display"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
627 Ports [1]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
628 Position [365, 75, 410, 115]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
629 SourceBlock "sltpda/AO class/display"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
630 SourceType "display"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
631 ShowPortLabels "FromPortIcon"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
632 SystemSampleTime "-1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
633 FunctionWithSeparateData off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
634 RTWMemSecFuncInitTerm "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
635 RTWMemSecFuncExecute "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
636 RTWMemSecDataConstants "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
637 RTWMemSecDataInternal "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
638 RTWMemSecDataParameters "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
639 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
640 Block {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
641 BlockType Reference
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
642 Name "display1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
643 Tag "display"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
644 Ports [1]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
645 Position [365, 20, 410, 60]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
646 SourceBlock "sltpda/AO class/display"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
647 SourceType "display"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
648 ShowPortLabels "FromPortIcon"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
649 SystemSampleTime "-1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
650 FunctionWithSeparateData off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
651 RTWMemSecFuncInitTerm "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
652 RTWMemSecFuncExecute "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
653 RTWMemSecDataConstants "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
654 RTWMemSecDataInternal "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
655 RTWMemSecDataParameters "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
656 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
657 Block {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
658 BlockType Reference
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
659 Name "display2"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
660 Tag "display"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
661 Ports [1]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
662 Position [350, 280, 395, 320]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
663 SourceBlock "sltpda/AO class/display"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
664 SourceType "display"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
665 ShowPortLabels "FromPortIcon"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
666 SystemSampleTime "-1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
667 FunctionWithSeparateData off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
668 RTWMemSecFuncInitTerm "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
669 RTWMemSecFuncExecute "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
670 RTWMemSecDataConstants "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
671 RTWMemSecDataInternal "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
672 RTWMemSecDataParameters "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
673 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
674 Block {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
675 BlockType Reference
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
676 Name "display3"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
677 Tag "display"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
678 Ports [1]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
679 Position [350, 225, 395, 265]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
680 SourceBlock "sltpda/AO class/display"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
681 SourceType "display"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
682 ShowPortLabels "FromPortIcon"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
683 SystemSampleTime "-1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
684 FunctionWithSeparateData off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
685 RTWMemSecFuncInitTerm "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
686 RTWMemSecFuncExecute "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
687 RTWMemSecDataConstants "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
688 RTWMemSecDataInternal "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
689 RTWMemSecDataParameters "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
690 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
691 Block {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
692 BlockType Reference
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
693 Name "get"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
694 Tag "get"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
695 Description "Get the propery of an analysis object."
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
696 Ports [1, 1]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
697 Position [285, 78, 330, 112]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
698 AttributesFormatString "%<Tag>\
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
699 %<param>"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
700 SourceBlock "sltpda/AO class/get"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
701 SourceType "get"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
702 ShowPortLabels "FromPortIcon"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
703 SystemSampleTime "-1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
704 FunctionWithSeparateData off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
705 RTWMemSecFuncInitTerm "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
706 RTWMemSecFuncExecute "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
707 RTWMemSecDataConstants "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
708 RTWMemSecDataInternal "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
709 RTWMemSecDataParameters "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
710 param "mdlfilename"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
711 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
712 Block {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
713 BlockType Reference
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
714 Name "get1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
715 Tag "get"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
716 Description "Get the propery of an analysis object."
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
717 Ports [1, 1]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
718 Position [285, 23, 330, 57]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
719 AttributesFormatString "%<Tag>\
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
720 %<param>"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
721 SourceBlock "sltpda/AO class/get"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
722 SourceType "get"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
723 ShowPortLabels "FromPortIcon"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
724 SystemSampleTime "-1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
725 FunctionWithSeparateData off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
726 RTWMemSecFuncInitTerm "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
727 RTWMemSecFuncExecute "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
728 RTWMemSecDataConstants "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
729 RTWMemSecDataInternal "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
730 RTWMemSecDataParameters "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
731 param "mdlfile"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
732 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
733 Block {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
734 BlockType Reference
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
735 Name "get2"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
736 Tag "get"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
737 Description "Get the propery of an analysis object."
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
738 Ports [1, 1]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
739 Position [270, 283, 315, 317]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
740 AttributesFormatString "%<Tag>\
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
741 %<param>"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
742 SourceBlock "sltpda/AO class/get"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
743 SourceType "get"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
744 ShowPortLabels "FromPortIcon"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
745 SystemSampleTime "-1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
746 FunctionWithSeparateData off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
747 RTWMemSecFuncInitTerm "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
748 RTWMemSecFuncExecute "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
749 RTWMemSecDataConstants "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
750 RTWMemSecDataInternal "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
751 RTWMemSecDataParameters "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
752 param "mdlfilename"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
753 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
754 Block {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
755 BlockType Reference
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
756 Name "get3"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
757 Tag "get"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
758 Description "Get the propery of an analysis object."
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
759 Ports [1, 1]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
760 Position [270, 228, 315, 262]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
761 AttributesFormatString "%<Tag>\
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
762 %<param>"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
763 SourceBlock "sltpda/AO class/get"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
764 SourceType "get"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
765 ShowPortLabels "FromPortIcon"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
766 SystemSampleTime "-1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
767 FunctionWithSeparateData off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
768 RTWMemSecFuncInitTerm "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
769 RTWMemSecFuncExecute "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
770 RTWMemSecDataConstants "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
771 RTWMemSecDataInternal "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
772 RTWMemSecDataParameters "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
773 param "mdlfile"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
774 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
775 Block {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
776 BlockType Reference
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
777 Name "testout"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
778 Tag "save"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
779 Ports [1]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
780 Position [365, 163, 405, 197]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
781 SourceBlock "sltpda/AO class/save"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
782 SourceType "save"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
783 ShowPortLabels "FromPortIcon"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
784 SystemSampleTime "-1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
785 FunctionWithSeparateData off
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
786 RTWMemSecFuncInitTerm "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
787 RTWMemSecFuncExecute "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
788 RTWMemSecDataConstants "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
789 RTWMemSecDataInternal "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
790 RTWMemSecDataParameters "Inherit from model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
791 fname "/Users/hewitson/working/ltp/ltpda/software/m-to"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
792 "olbox/sltpda/testout.xml"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
793 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
794 Line {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
795 SrcBlock "attach model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
796 SrcPort 1
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
797 Points [10, 0]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
798 Branch {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
799 DstBlock "get1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
800 DstPort 1
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
801 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
802 Branch {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
803 Points [0, 0]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
804 Branch {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
805 DstBlock "get"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
806 DstPort 1
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
807 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
808 Branch {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
809 Points [0, 85]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
810 DstBlock "testout"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
811 DstPort 1
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
812 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
813 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
814 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
815 Line {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
816 SrcBlock "data2"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
817 SrcPort 1
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
818 DstBlock "attach model"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
819 DstPort 1
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
820 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
821 Line {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
822 SrcBlock "get"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
823 SrcPort 1
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
824 DstBlock "display"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
825 DstPort 1
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
826 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
827 Line {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
828 SrcBlock "get1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
829 SrcPort 1
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
830 DstBlock "display1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
831 DstPort 1
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
832 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
833 Line {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
834 SrcBlock "get2"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
835 SrcPort 1
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
836 DstBlock "display2"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
837 DstPort 1
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
838 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
839 Line {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
840 SrcBlock "get3"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
841 SrcPort 1
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
842 DstBlock "display3"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
843 DstPort 1
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
844 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
845 Line {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
846 SrcBlock "data1"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
847 SrcPort 1
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
848 Points [55, 0; 0, 40]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
849 Branch {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
850 DstBlock "get3"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
851 DstPort 1
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
852 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
853 Branch {
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
854 Points [0, 55]
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
855 DstBlock "get2"
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
856 DstPort 1
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
857 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
858 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
859 }
f0afece42f48 Import.
Daniele Nicolodi <nicolodi@science.unitn.it>
parents:
diff changeset
860 }