comparison m-toolbox/sltpda/test/test_const.mdl @ 0:f0afece42f48

Import.
author Daniele Nicolodi <nicolodi@science.unitn.it>
date Wed, 23 Nov 2011 19:22:13 +0100
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children
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-1:000000000000 0:f0afece42f48
1 Model {
2 Name "test_const"
3 Version 6.6
4 MdlSubVersion 0
5 GraphicalInterface {
6 NumRootInports 0
7 NumRootOutports 0
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10 NumModelReferences 0
11 NumTestPointedSignals 0
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18 ShowLineDimensions off
19 ShowPortDataTypes off
20 ShowLoopsOnError on
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22 ShowStorageClass off
23 ShowTestPointIcons on
24 ShowViewerIcons on
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26 ExecutionContextIcon off
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28 ScopeRefreshTime 0.035000
29 OverrideScopeRefreshTime on
30 DisableAllScopes off
31 DataTypeOverride "UseLocalSettings"
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34 BlockNameDataTip off
35 BlockParametersDataTip off
36 BlockDescriptionStringDataTip off
37 ToolBar on
38 StatusBar on
39 BrowserShowLibraryLinks off
40 BrowserLookUnderMasks off
41 Created "Sun Apr 1 08:20:15 2007"
42 Creator "hewitson"
43 UpdateHistory "UpdateHistoryNever"
44 ModifiedByFormat "%<Auto>"
45 LastModifiedBy "hewitson"
46 ModifiedDateFormat "%<Auto>"
47 LastModifiedDate "Mon Apr 2 09:43:45 2007"
48 ModelVersionFormat "1.%<AutoIncrement:6>"
49 ConfigurationManager "cvs"
50 SimulationMode "normal"
51 LinearizationMsg "none"
52 Profile off
53 ParamWorkspaceSource "MATLABWorkspace"
54 AccelSystemTargetFile "accel.tlc"
55 AccelTemplateMakefile "accel_default_tmf"
56 AccelMakeCommand "make_rtw"
57 AccelVerboseBuild off
58 TryForcingSFcnDF off
59 RecordCoverage off
60 CovPath "/"
61 CovSaveName "covdata"
62 CovMetricSettings "dw"
63 CovNameIncrementing off
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66 CovSaveSingleToWorkspaceVar on
67 CovCumulativeVarName "covCumulativeData"
68 CovCumulativeReport off
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86 ExtModeWriteAllDataToWs off
87 ExtModeArmWhenConnect on
88 ExtModeSkipDownloadWhenConnect off
89 ExtModeLogAll on
90 ExtModeAutoUpdateStatusClock off
91 BufferReuse on
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93 ShowModelReferenceBlockVersion off
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95 Array {
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106 Version "1.2.0"
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108 StopTime "10.0"
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113 MaxOrder 5
114 ConsecutiveZCsStepRelTol "10*128*eps"
115 MaxConsecutiveZCs "1000"
116 ExtrapolationOrder 4
117 NumberNewtonIterations 1
118 MaxStep "auto"
119 MinStep "auto"
120 MaxConsecutiveMinStep "1"
121 RelTol "1e-3"
122 SolverMode "Auto"
123 Solver "ode45"
124 SolverName "ode45"
125 ZeroCrossControl "UseLocalSettings"
126 AlgebraicLoopSolver "TrustRegion"
127 SolverResetMethod "Fast"
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131 RateTranMode "Deterministic"
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144 SaveFinalState off
145 SaveFormat "Array"
146 SaveOutput on
147 SaveState off
148 SignalLogging on
149 InspectSignalLogs off
150 SaveTime on
151 StateSaveName "xout"
152 TimeSaveName "tout"
153 OutputSaveName "yout"
154 SignalLoggingName "logsout"
155 OutputOption "RefineOutputTimes"
156 OutputTimes "[]"
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159 Simulink.OptimizationCC {
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164 Cell "ZeroExternalMemoryAtStartup"
165 Cell "ZeroInternalMemoryAtStartup"
166 Cell "InitFltsAndDblsToZero"
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168 Cell "NoFixptDivByZeroProtection"
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187 DataBitsets off
188 UseTempVars off
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192 NoFixptDivByZeroProtection off
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205 ReadBeforeWriteMsg "UseLocalSettings"
206 WriteAfterWriteMsg "UseLocalSettings"
207 WriteAfterReadMsg "UseLocalSettings"
208 AlgebraicLoopMsg "warning"
209 ArtificialAlgebraicLoopMsg "warning"
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212 CheckExecutionContextRuntimeOutputMsg off
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214 BlockPriorityViolationMsg "warning"
215 MinStepSizeMsg "warning"
216 TimeAdjustmentMsg "none"
217 MaxConsecutiveZCsMsg "error"
218 SolverPrmCheckMsg "warning"
219 InheritedTsInSrcMsg "warning"
220 DiscreteInheritContinuousMsg "warning"
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222 MultiTaskCondExecSysMsg "error"
223 MultiTaskRateTransMsg "error"
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225 TasksWithSamePriorityMsg "warning"
226 SigSpecEnsureSampleTimeMsg "warning"
227 CheckMatrixSingularityMsg "none"
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237 VectorMatrixConversionMsg "none"
238 InvalidFcnCallConnMsg "error"
239 FcnCallInpInsideContextMsg "Use local settings"
240 SignalLabelMismatchMsg "none"
241 UnconnectedInputMsg "warning"
242 UnconnectedOutputMsg "warning"
243 UnconnectedLineMsg "warning"
244 SFcnCompatibilityMsg "none"
245 UniqueDataStoreMsg "none"
246 BusObjectLabelMismatch "warning"
247 RootOutportRequireBusObject "warning"
248 AssertControl "UseLocalSettings"
249 EnableOverflowDetection off
250 ModelReferenceIOMsg "none"
251 ModelReferenceVersionMismatchMessage "none"
252 ModelReferenceIOMismatchMessage "none"
253 ModelReferenceCSMismatchMessage "none"
254 ModelReferenceSimTargetVerbose off
255 UnknownTsInhSupMsg "warning"
256 ModelReferenceDataLoggingMessage "warning"
257 ModelReferenceSymbolNameMessage "warning"
258 ModelReferenceExtraNoncontSigs "error"
259 StateNameClashWarn "warning"
260 StrictBusMsg "Warning"
261 }
262 Simulink.HardwareCC {
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267 ProdBitPerInt 32
268 ProdBitPerLong 32
269 ProdIntDivRoundTo "Undefined"
270 ProdEndianess "Unspecified"
271 ProdWordSize 32
272 ProdShiftRightIntArith on
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274 TargetBitPerChar 8
275 TargetBitPerShort 16
276 TargetBitPerInt 32
277 TargetBitPerLong 32
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286 TargetUnknown off
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296 ModelReferenceMinAlgLoopOccurrences off
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305 PropName "DisabledProps"
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309 GenCodeOnly off
310 MakeCommand "make_rtw"
311 GenerateMakefile on
312 TemplateMakefile "grt_default_tmf"
313 GenerateReport off
314 SaveLog off
315 RTWVerbose on
316 RetainRTWFile off
317 ProfileTLC off
318 TLCDebug off
319 TLCCoverage off
320 TLCAssert off
321 ProcessScriptMode "Default"
322 ConfigurationMode "Optimized"
323 ConfigAtBuild off
324 IncludeHyperlinkInReport off
325 LaunchReport off
326 TargetLang "C"
327 IncludeBusHierarchyInRTWFileBlockHierarchyMap off
328 IncludeERTFirstTime off
329 Array {
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331 Dimension 2
332 Simulink.CodeAppCC {
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338 Cell "InsertBlockDesc"
339 Cell "SFDataObjDesc"
340 Cell "SimulinkDataObjDesc"
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342 Cell "SignalNamingRule"
343 Cell "ParamNamingRule"
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346 Cell "CustomSymbolStrGlobalVar"
347 Cell "CustomSymbolStrType"
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350 Cell "CustomSymbolStrBlkIO"
351 Cell "CustomSymbolStrTmpVar"
352 Cell "CustomSymbolStrMacro"
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386 Simulink.GRTTargetCC {
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391 Dimension 15
392 Cell "IncludeMdlTerminateFcn"
393 Cell "CombineOutputUpdateFcns"
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402 Cell "SupportNonFinite"
403 Cell "SupportComplex"
404 Cell "SupportAbsoluteTime"
405 Cell "SupportContinuousTime"
406 Cell "SupportNonInlinedSFcns"
407 Cell "PortableWordSizes"
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409 }
410 Version "1.2.0"
411 TargetFcnLib "ansi_tfl_tmw.mat"
412 TargetLibSuffix ""
413 TargetPreCompLibLocation ""
414 GenFloatMathFcnCalls "ANSI_C"
415 UtilityFuncGeneration "Auto"
416 GenerateFullHeader on
417 GenerateSampleERTMain off
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419 IsPILTarget off
420 ModelReferenceCompliant on
421 IncludeMdlTerminateFcn on
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427 LogVarNameModifier "rt_"
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430 SupportNonFinite on
431 SupportComplex on
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435 EnableShiftOperators on
436 ParenthesesLevel "Nominal"
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438 ModelStepFunctionPrototypeControlCompliant off
439 ExtMode off
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441 ExtModeTesting off
442 ExtModeStaticAllocSize 1000000
443 ExtModeTransport 0
444 ExtModeMexFile "ext_comm"
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446 RTWCAPIParams off
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449 }
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451 }
452 }
453 PropName "Components"
454 }
455 Name "Configuration"
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459 }
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471 FontSize 10
472 FontWeight "normal"
473 FontAngle "normal"
474 ShowName on
475 }
476 BlockParameterDefaults {
477 Block {
478 BlockType Inport
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480 UseBusObject off
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484 SampleTime "-1"
485 DataType "auto"
486 OutDataType "sfix(16)"
487 OutScaling "2^0"
488 SignalType "auto"
489 SamplingMode "auto"
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491 LatchByCopyingInsideSignal off
492 Interpolate on
493 }
494 Block {
495 BlockType Outport
496 Port "1"
497 UseBusObject off
498 BusObject "BusObject"
499 BusOutputAsStruct off
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501 SampleTime "-1"
502 DataType "auto"
503 OutDataType "sfix(16)"
504 OutScaling "2^0"
505 SignalType "auto"
506 SamplingMode "auto"
507 OutputWhenDisabled "held"
508 InitialOutput "[]"
509 }
510 Block {
511 BlockType SubSystem
512 ShowPortLabels "FromPortIcon"
513 Permissions "ReadWrite"
514 PermitHierarchicalResolution "All"
515 TreatAsAtomicUnit off
516 SystemSampleTime "-1"
517 RTWFcnNameOpts "Auto"
518 RTWFileNameOpts "Auto"
519 RTWMemSecFuncInitTerm "Inherit from model"
520 RTWMemSecFuncExecute "Inherit from model"
521 RTWMemSecDataConstants "Inherit from model"
522 RTWMemSecDataInternal "Inherit from model"
523 RTWMemSecDataParameters "Inherit from model"
524 SimViewingDevice off
525 DataTypeOverride "UseLocalSettings"
526 MinMaxOverflowLogging "UseLocalSettings"
527 }
528 }
529 AnnotationDefaults {
530 HorizontalAlignment "center"
531 VerticalAlignment "middle"
532 ForegroundColor "black"
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534 DropShadow off
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536 FontSize 10
537 FontWeight "normal"
538 FontAngle "normal"
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540 }
541 LineDefaults {
542 FontName "Helvetica"
543 FontSize 9
544 FontWeight "normal"
545 FontAngle "normal"
546 }
547 System {
548 Name "test_const"
549 Location [324, 147, 904, 407]
550 Open on
551 ModelBrowserVisibility off
552 ModelBrowserWidth 200
553 ScreenColor "white"
554 PaperOrientation "landscape"
555 PaperPositionMode "auto"
556 PaperType "A4"
557 PaperUnits "inches"
558 TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
559 TiledPageScale 1
560 ShowPageBoundaries off
561 ZoomFactor "100"
562 ReportName "simulink-default.rpt"
563 Block {
564 BlockType Reference
565 Name "AO Data"
566 Tag "ao"
567 Ports [0, 1]
568 Position [160, 138, 215, 182]
569 SourceBlock "sltpda/math blocks/AO Data"
570 SourceType "ao"
571 ShowPortLabels "FromPortIcon"
572 SystemSampleTime "-1"
573 FunctionWithSeparateData off
574 RTWMemSecFuncInitTerm "Inherit from model"
575 RTWMemSecFuncExecute "Inherit from model"
576 RTWMemSecDataConstants "Inherit from model"
577 RTWMemSecDataInternal "Inherit from model"
578 RTWMemSecDataParameters "Inherit from model"
579 vals "10"
580 }
581 Block {
582 BlockType Reference
583 Name "AO Fcn"
584 Tag "ao"
585 Ports [0, 1]
586 Position [90, 47, 150, 93]
587 SourceBlock "sltpda/math blocks/AO Fcn"
588 SourceType "ao"
589 ShowPortLabels "FromPortIcon"
590 SystemSampleTime "-1"
591 FunctionWithSeparateData off
592 RTWMemSecFuncInitTerm "Inherit from model"
593 RTWMemSecFuncExecute "Inherit from model"
594 RTWMemSecDataConstants "Inherit from model"
595 RTWMemSecDataInternal "Inherit from model"
596 RTWMemSecDataParameters "Inherit from model"
597 fcn "randn(1,1000)"
598 }
599 Block {
600 BlockType Reference
601 Name "plot"
602 Tag "plot"
603 Description "Plot an analysis object."
604 Ports [1]
605 Position [365, 69, 395, 101]
606 AttributesFormatString "%<Tag>"
607 SourceBlock "sltpda/AO class/plot"
608 SourceType "plot"
609 ShowPortLabels "FromPortIcon"
610 SystemSampleTime "-1"
611 FunctionWithSeparateData off
612 RTWMemSecFuncInitTerm "Inherit from model"
613 RTWMemSecFuncExecute "Inherit from model"
614 RTWMemSecDataConstants "Inherit from model"
615 RTWMemSecDataInternal "Inherit from model"
616 RTWMemSecDataParameters "Inherit from model"
617 xscale "linear"
618 yscale "linear"
619 }
620 Block {
621 BlockType Reference
622 Name "plus"
623 Tag "plus"
624 Ports [2, 1]
625 Position [265, 76, 300, 109]
626 AttributesFormatString "%<Tag>"
627 SourceBlock "sltpda/math blocks/plus"
628 SourceType "plus"
629 ShowPortLabels "FromPortIcon"
630 SystemSampleTime "-1"
631 FunctionWithSeparateData off
632 RTWMemSecFuncInitTerm "Inherit from model"
633 RTWMemSecFuncExecute "Inherit from model"
634 RTWMemSecDataConstants "Inherit from model"
635 RTWMemSecDataInternal "Inherit from model"
636 RTWMemSecDataParameters "Inherit from model"
637 }
638 Line {
639 SrcBlock "AO Fcn"
640 SrcPort 1
641 Points [45, 0; 0, 15]
642 DstBlock "plus"
643 DstPort 1
644 }
645 Line {
646 SrcBlock "plus"
647 SrcPort 1
648 Points [20, 0; 0, -10]
649 DstBlock "plot"
650 DstPort 1
651 }
652 Line {
653 SrcBlock "AO Data"
654 SrcPort 1
655 Points [10, 0; 0, -60]
656 DstBlock "plus"
657 DstPort 2
658 }
659 }
660 }