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comparison m-toolbox/sltpda/test/test_siggen.mdl @ 0:f0afece42f48

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author Daniele Nicolodi <nicolodi@science.unitn.it>
date Wed, 23 Nov 2011 19:22:13 +0100
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-1:000000000000 0:f0afece42f48
1 Model {
2 Name "test_siggen"
3 Version 6.6
4 MdlSubVersion 0
5 GraphicalInterface {
6 NumRootInports 0
7 NumRootOutports 0
8 ParameterArgumentNames ""
9 ComputedModelVersion "1.8"
10 NumModelReferences 0
11 NumTestPointedSignals 0
12 }
13 SavedCharacterEncoding "ISO-8859-1"
14 SaveDefaultBlockParams on
15 SampleTimeColors off
16 LibraryLinkDisplay "none"
17 WideLines off
18 ShowLineDimensions off
19 ShowPortDataTypes off
20 ShowLoopsOnError on
21 IgnoreBidirectionalLines off
22 ShowStorageClass off
23 ShowTestPointIcons on
24 ShowViewerIcons on
25 SortedOrder off
26 ExecutionContextIcon off
27 ShowLinearizationAnnotations on
28 ScopeRefreshTime 0.035000
29 OverrideScopeRefreshTime on
30 DisableAllScopes off
31 DataTypeOverride "UseLocalSettings"
32 MinMaxOverflowLogging "UseLocalSettings"
33 MinMaxOverflowArchiveMode "Overwrite"
34 BlockNameDataTip off
35 BlockParametersDataTip off
36 BlockDescriptionStringDataTip off
37 ToolBar on
38 StatusBar on
39 BrowserShowLibraryLinks off
40 BrowserLookUnderMasks off
41 Created "Mon Apr 2 14:23:04 2007"
42 Creator "hewitson"
43 UpdateHistory "UpdateHistoryNever"
44 ModifiedByFormat "%<Auto>"
45 LastModifiedBy "hewitson"
46 ModifiedDateFormat "%<Auto>"
47 LastModifiedDate "Thu Apr 5 09:53:15 2007"
48 ModelVersionFormat "1.%<AutoIncrement:8>"
49 ConfigurationManager "cvs"
50 SimulationMode "normal"
51 LinearizationMsg "none"
52 Profile off
53 ParamWorkspaceSource "MATLABWorkspace"
54 AccelSystemTargetFile "accel.tlc"
55 AccelTemplateMakefile "accel_default_tmf"
56 AccelMakeCommand "make_rtw"
57 AccelVerboseBuild off
58 TryForcingSFcnDF off
59 RecordCoverage off
60 CovPath "/"
61 CovSaveName "covdata"
62 CovMetricSettings "dw"
63 CovNameIncrementing off
64 CovHtmlReporting on
65 covSaveCumulativeToWorkspaceVar on
66 CovSaveSingleToWorkspaceVar on
67 CovCumulativeVarName "covCumulativeData"
68 CovCumulativeReport off
69 CovReportOnPause on
70 ExtModeBatchMode off
71 ExtModeEnableFloating on
72 ExtModeTrigType "manual"
73 ExtModeTrigMode "normal"
74 ExtModeTrigPort "1"
75 ExtModeTrigElement "any"
76 ExtModeTrigDuration 1000
77 ExtModeTrigDurationFloating "auto"
78 ExtModeTrigHoldOff 0
79 ExtModeTrigDelay 0
80 ExtModeTrigDirection "rising"
81 ExtModeTrigLevel 0
82 ExtModeArchiveMode "off"
83 ExtModeAutoIncOneShot off
84 ExtModeIncDirWhenArm off
85 ExtModeAddSuffixToVar off
86 ExtModeWriteAllDataToWs off
87 ExtModeArmWhenConnect on
88 ExtModeSkipDownloadWhenConnect off
89 ExtModeLogAll on
90 ExtModeAutoUpdateStatusClock off
91 BufferReuse on
92 ProdHWDeviceType "32-bit Generic"
93 ShowModelReferenceBlockVersion off
94 ShowModelReferenceBlockIO off
95 Array {
96 Type "Handle"
97 Dimension 1
98 Simulink.ConfigSet {
99 $ObjectID 1
100 Version "1.2.0"
101 Array {
102 Type "Handle"
103 Dimension 7
104 Simulink.SolverCC {
105 $ObjectID 2
106 Version "1.2.0"
107 StartTime "0.0"
108 StopTime "10.0"
109 AbsTol "auto"
110 FixedStep "auto"
111 InitialStep "auto"
112 MaxNumMinSteps "-1"
113 MaxOrder 5
114 ConsecutiveZCsStepRelTol "10*128*eps"
115 MaxConsecutiveZCs "1000"
116 ExtrapolationOrder 4
117 NumberNewtonIterations 1
118 MaxStep "auto"
119 MinStep "auto"
120 MaxConsecutiveMinStep "1"
121 RelTol "1e-3"
122 SolverMode "Auto"
123 Solver "ode45"
124 SolverName "ode45"
125 ZeroCrossControl "UseLocalSettings"
126 AlgebraicLoopSolver "TrustRegion"
127 SolverResetMethod "Fast"
128 PositivePriorityOrder off
129 AutoInsertRateTranBlk off
130 SampleTimeConstraint "Unconstrained"
131 RateTranMode "Deterministic"
132 }
133 Simulink.DataIOCC {
134 $ObjectID 3
135 Version "1.2.0"
136 Decimation "1"
137 ExternalInput "[t, u]"
138 FinalStateName "xFinal"
139 InitialState "xInitial"
140 LimitDataPoints on
141 MaxDataPoints "1000"
142 LoadExternalInput off
143 LoadInitialState off
144 SaveFinalState off
145 SaveFormat "Array"
146 SaveOutput on
147 SaveState off
148 SignalLogging on
149 InspectSignalLogs off
150 SaveTime on
151 StateSaveName "xout"
152 TimeSaveName "tout"
153 OutputSaveName "yout"
154 SignalLoggingName "logsout"
155 OutputOption "RefineOutputTimes"
156 OutputTimes "[]"
157 Refine "1"
158 }
159 Simulink.OptimizationCC {
160 $ObjectID 4
161 Array {
162 Type "Cell"
163 Dimension 5
164 Cell "ZeroExternalMemoryAtStartup"
165 Cell "ZeroInternalMemoryAtStartup"
166 Cell "InitFltsAndDblsToZero"
167 Cell "OptimizeModelRefInitCode"
168 Cell "NoFixptDivByZeroProtection"
169 PropName "DisabledProps"
170 }
171 Version "1.2.0"
172 BlockReduction on
173 BooleanDataType on
174 ConditionallyExecuteInputs on
175 InlineParams off
176 InlineInvariantSignals off
177 OptimizeBlockIOStorage on
178 BufferReuse on
179 EnforceIntegerDowncast on
180 ExpressionFolding on
181 ExpressionDepthLimit 2147483647
182 FoldNonRolledExpr on
183 LocalBlockOutputs on
184 RollThreshold 5
185 SystemCodeInlineAuto off
186 StateBitsets off
187 DataBitsets off
188 UseTempVars off
189 ZeroExternalMemoryAtStartup on
190 ZeroInternalMemoryAtStartup on
191 InitFltsAndDblsToZero on
192 NoFixptDivByZeroProtection off
193 EfficientFloat2IntCast off
194 OptimizeModelRefInitCode off
195 LifeSpan "inf"
196 BufferReusableBoundary on
197 }
198 Simulink.DebuggingCC {
199 $ObjectID 5
200 Version "1.2.0"
201 RTPrefix "error"
202 ConsistencyChecking "none"
203 ArrayBoundsChecking "none"
204 SignalInfNanChecking "none"
205 ReadBeforeWriteMsg "UseLocalSettings"
206 WriteAfterWriteMsg "UseLocalSettings"
207 WriteAfterReadMsg "UseLocalSettings"
208 AlgebraicLoopMsg "warning"
209 ArtificialAlgebraicLoopMsg "warning"
210 CheckSSInitialOutputMsg on
211 CheckExecutionContextPreStartOutputMsg off
212 CheckExecutionContextRuntimeOutputMsg off
213 SignalResolutionControl "UseLocalSettings"
214 BlockPriorityViolationMsg "warning"
215 MinStepSizeMsg "warning"
216 TimeAdjustmentMsg "none"
217 MaxConsecutiveZCsMsg "error"
218 SolverPrmCheckMsg "warning"
219 InheritedTsInSrcMsg "warning"
220 DiscreteInheritContinuousMsg "warning"
221 MultiTaskDSMMsg "error"
222 MultiTaskCondExecSysMsg "error"
223 MultiTaskRateTransMsg "error"
224 SingleTaskRateTransMsg "none"
225 TasksWithSamePriorityMsg "warning"
226 SigSpecEnsureSampleTimeMsg "warning"
227 CheckMatrixSingularityMsg "none"
228 IntegerOverflowMsg "warning"
229 Int32ToFloatConvMsg "warning"
230 ParameterDowncastMsg "error"
231 ParameterOverflowMsg "error"
232 ParameterUnderflowMsg "none"
233 ParameterPrecisionLossMsg "warning"
234 ParameterTunabilityLossMsg "warning"
235 UnderSpecifiedDataTypeMsg "none"
236 UnnecessaryDatatypeConvMsg "none"
237 VectorMatrixConversionMsg "none"
238 InvalidFcnCallConnMsg "error"
239 FcnCallInpInsideContextMsg "Use local settings"
240 SignalLabelMismatchMsg "none"
241 UnconnectedInputMsg "warning"
242 UnconnectedOutputMsg "warning"
243 UnconnectedLineMsg "warning"
244 SFcnCompatibilityMsg "none"
245 UniqueDataStoreMsg "none"
246 BusObjectLabelMismatch "warning"
247 RootOutportRequireBusObject "warning"
248 AssertControl "UseLocalSettings"
249 EnableOverflowDetection off
250 ModelReferenceIOMsg "none"
251 ModelReferenceVersionMismatchMessage "none"
252 ModelReferenceIOMismatchMessage "none"
253 ModelReferenceCSMismatchMessage "none"
254 ModelReferenceSimTargetVerbose off
255 UnknownTsInhSupMsg "warning"
256 ModelReferenceDataLoggingMessage "warning"
257 ModelReferenceSymbolNameMessage "warning"
258 ModelReferenceExtraNoncontSigs "error"
259 StateNameClashWarn "warning"
260 StrictBusMsg "Warning"
261 }
262 Simulink.HardwareCC {
263 $ObjectID 6
264 Version "1.2.0"
265 ProdBitPerChar 8
266 ProdBitPerShort 16
267 ProdBitPerInt 32
268 ProdBitPerLong 32
269 ProdIntDivRoundTo "Undefined"
270 ProdEndianess "Unspecified"
271 ProdWordSize 32
272 ProdShiftRightIntArith on
273 ProdHWDeviceType "32-bit Generic"
274 TargetBitPerChar 8
275 TargetBitPerShort 16
276 TargetBitPerInt 32
277 TargetBitPerLong 32
278 TargetShiftRightIntArith on
279 TargetIntDivRoundTo "Undefined"
280 TargetEndianess "Unspecified"
281 TargetWordSize 32
282 TargetTypeEmulationWarnSuppressLevel 0
283 TargetPreprocMaxBitsSint 32
284 TargetPreprocMaxBitsUint 32
285 TargetHWDeviceType "Specified"
286 TargetUnknown off
287 ProdEqTarget on
288 }
289 Simulink.ModelReferenceCC {
290 $ObjectID 7
291 Version "1.2.0"
292 UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange"
293 CheckModelReferenceTargetMessage "error"
294 ModelReferenceNumInstancesAllowed "Multi"
295 ModelReferencePassRootInputsByReference on
296 ModelReferenceMinAlgLoopOccurrences off
297 }
298 Simulink.RTWCC {
299 $BackupClass "Simulink.RTWCC"
300 $ObjectID 8
301 Array {
302 Type "Cell"
303 Dimension 1
304 Cell "IncludeHyperlinkInReport"
305 PropName "DisabledProps"
306 }
307 Version "1.2.0"
308 SystemTargetFile "grt.tlc"
309 GenCodeOnly off
310 MakeCommand "make_rtw"
311 GenerateMakefile on
312 TemplateMakefile "grt_default_tmf"
313 GenerateReport off
314 SaveLog off
315 RTWVerbose on
316 RetainRTWFile off
317 ProfileTLC off
318 TLCDebug off
319 TLCCoverage off
320 TLCAssert off
321 ProcessScriptMode "Default"
322 ConfigurationMode "Optimized"
323 ConfigAtBuild off
324 IncludeHyperlinkInReport off
325 LaunchReport off
326 TargetLang "C"
327 IncludeBusHierarchyInRTWFileBlockHierarchyMap off
328 IncludeERTFirstTime off
329 Array {
330 Type "Handle"
331 Dimension 2
332 Simulink.CodeAppCC {
333 $ObjectID 9
334 Array {
335 Type "Cell"
336 Dimension 16
337 Cell "IgnoreCustomStorageClasses"
338 Cell "InsertBlockDesc"
339 Cell "SFDataObjDesc"
340 Cell "SimulinkDataObjDesc"
341 Cell "DefineNamingRule"
342 Cell "SignalNamingRule"
343 Cell "ParamNamingRule"
344 Cell "InlinedPrmAccess"
345 Cell "CustomSymbolStr"
346 Cell "CustomSymbolStrGlobalVar"
347 Cell "CustomSymbolStrType"
348 Cell "CustomSymbolStrField"
349 Cell "CustomSymbolStrFcn"
350 Cell "CustomSymbolStrBlkIO"
351 Cell "CustomSymbolStrTmpVar"
352 Cell "CustomSymbolStrMacro"
353 PropName "DisabledProps"
354 }
355 Version "1.2.0"
356 ForceParamTrailComments off
357 GenerateComments on
358 IgnoreCustomStorageClasses on
359 IncHierarchyInIds off
360 MaxIdLength 31
361 PreserveName off
362 PreserveNameWithParent off
363 ShowEliminatedStatement off
364 IncAutoGenComments off
365 SimulinkDataObjDesc off
366 SFDataObjDesc off
367 IncDataTypeInIds off
368 PrefixModelToSubsysFcnNames on
369 MangleLength 1
370 CustomSymbolStrGlobalVar "$R$N$M"
371 CustomSymbolStrType "$N$R$M"
372 CustomSymbolStrField "$N$M"
373 CustomSymbolStrFcn "$R$N$M$F"
374 CustomSymbolStrBlkIO "rtb_$N$M"
375 CustomSymbolStrTmpVar "$N$M"
376 CustomSymbolStrMacro "$R$N$M"
377 DefineNamingRule "None"
378 ParamNamingRule "None"
379 SignalNamingRule "None"
380 InsertBlockDesc off
381 SimulinkBlockComments on
382 EnableCustomComments off
383 InlinedPrmAccess "Literals"
384 ReqsInCode off
385 }
386 Simulink.GRTTargetCC {
387 $BackupClass "Simulink.TargetCC"
388 $ObjectID 10
389 Array {
390 Type "Cell"
391 Dimension 15
392 Cell "IncludeMdlTerminateFcn"
393 Cell "CombineOutputUpdateFcns"
394 Cell "SuppressErrorStatus"
395 Cell "ERTCustomFileBanners"
396 Cell "GenerateSampleERTMain"
397 Cell "GenerateTestInterfaces"
398 Cell "ModelStepFunctionPrototypeControlComp"
399 "liant"
400 Cell "MultiInstanceERTCode"
401 Cell "PurelyIntegerCode"
402 Cell "SupportNonFinite"
403 Cell "SupportComplex"
404 Cell "SupportAbsoluteTime"
405 Cell "SupportContinuousTime"
406 Cell "SupportNonInlinedSFcns"
407 Cell "PortableWordSizes"
408 PropName "DisabledProps"
409 }
410 Version "1.2.0"
411 TargetFcnLib "ansi_tfl_tmw.mat"
412 TargetLibSuffix ""
413 TargetPreCompLibLocation ""
414 GenFloatMathFcnCalls "ANSI_C"
415 UtilityFuncGeneration "Auto"
416 GenerateFullHeader on
417 GenerateSampleERTMain off
418 GenerateTestInterfaces off
419 IsPILTarget off
420 ModelReferenceCompliant on
421 IncludeMdlTerminateFcn on
422 CombineOutputUpdateFcns off
423 SuppressErrorStatus off
424 IncludeFileDelimiter "Auto"
425 ERTCustomFileBanners off
426 SupportAbsoluteTime on
427 LogVarNameModifier "rt_"
428 MatFileLogging on
429 MultiInstanceERTCode off
430 SupportNonFinite on
431 SupportComplex on
432 PurelyIntegerCode off
433 SupportContinuousTime on
434 SupportNonInlinedSFcns on
435 EnableShiftOperators on
436 ParenthesesLevel "Nominal"
437 PortableWordSizes off
438 ModelStepFunctionPrototypeControlCompliant off
439 ExtMode off
440 ExtModeStaticAlloc off
441 ExtModeTesting off
442 ExtModeStaticAllocSize 1000000
443 ExtModeTransport 0
444 ExtModeMexFile "ext_comm"
445 RTWCAPISignals off
446 RTWCAPIParams off
447 RTWCAPIStates off
448 GenerateASAP2 off
449 }
450 PropName "Components"
451 }
452 }
453 PropName "Components"
454 }
455 Name "Configuration"
456 CurrentDlgPage "Solver"
457 }
458 PropName "ConfigurationSets"
459 }
460 Simulink.ConfigSet {
461 $PropName "ActiveConfigurationSet"
462 $ObjectID 1
463 }
464 BlockDefaults {
465 Orientation "right"
466 ForegroundColor "black"
467 BackgroundColor "white"
468 DropShadow off
469 NamePlacement "normal"
470 FontName "Helvetica"
471 FontSize 10
472 FontWeight "normal"
473 FontAngle "normal"
474 ShowName on
475 }
476 BlockParameterDefaults {
477 Block {
478 BlockType Inport
479 Port "1"
480 UseBusObject off
481 BusObject "BusObject"
482 BusOutputAsStruct off
483 PortDimensions "-1"
484 SampleTime "-1"
485 DataType "auto"
486 OutDataType "sfix(16)"
487 OutScaling "2^0"
488 SignalType "auto"
489 SamplingMode "auto"
490 LatchByDelayingOutsideSignal off
491 LatchByCopyingInsideSignal off
492 Interpolate on
493 }
494 Block {
495 BlockType Outport
496 Port "1"
497 UseBusObject off
498 BusObject "BusObject"
499 BusOutputAsStruct off
500 PortDimensions "-1"
501 SampleTime "-1"
502 DataType "auto"
503 OutDataType "sfix(16)"
504 OutScaling "2^0"
505 SignalType "auto"
506 SamplingMode "auto"
507 OutputWhenDisabled "held"
508 InitialOutput "[]"
509 }
510 Block {
511 BlockType SubSystem
512 ShowPortLabels "FromPortIcon"
513 Permissions "ReadWrite"
514 PermitHierarchicalResolution "All"
515 TreatAsAtomicUnit off
516 SystemSampleTime "-1"
517 RTWFcnNameOpts "Auto"
518 RTWFileNameOpts "Auto"
519 RTWMemSecFuncInitTerm "Inherit from model"
520 RTWMemSecFuncExecute "Inherit from model"
521 RTWMemSecDataConstants "Inherit from model"
522 RTWMemSecDataInternal "Inherit from model"
523 RTWMemSecDataParameters "Inherit from model"
524 SimViewingDevice off
525 DataTypeOverride "UseLocalSettings"
526 MinMaxOverflowLogging "UseLocalSettings"
527 }
528 }
529 AnnotationDefaults {
530 HorizontalAlignment "center"
531 VerticalAlignment "middle"
532 ForegroundColor "black"
533 BackgroundColor "white"
534 DropShadow off
535 FontName "Helvetica"
536 FontSize 10
537 FontWeight "normal"
538 FontAngle "normal"
539 UseDisplayTextAsClickCallback off
540 }
541 LineDefaults {
542 FontName "Helvetica"
543 FontSize 9
544 FontWeight "normal"
545 FontAngle "normal"
546 }
547 System {
548 Name "test_siggen"
549 Location [273, 89, 1027, 444]
550 Open on
551 ModelBrowserVisibility off
552 ModelBrowserWidth 200
553 ScreenColor "white"
554 PaperOrientation "landscape"
555 PaperPositionMode "auto"
556 PaperType "A4"
557 PaperUnits "inches"
558 TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
559 TiledPageScale 1
560 ShowPageBoundaries off
561 ZoomFactor "100"
562 ReportName "simulink-default.rpt"
563 Block {
564 BlockType Reference
565 Name "Signal Generator"
566 Tag "ao"
567 Ports [0, 1]
568 Position [55, 131, 105, 179]
569 AttributesFormatString "%<tsfcn>"
570 SourceBlock "sltpda/AO class/Signal Generator"
571 SourceType "ao"
572 ShowPortLabels "FromPortIcon"
573 SystemSampleTime "-1"
574 FunctionWithSeparateData off
575 RTWMemSecFuncInitTerm "Inherit from model"
576 RTWMemSecFuncExecute "Inherit from model"
577 RTWMemSecDataConstants "Inherit from model"
578 RTWMemSecDataInternal "Inherit from model"
579 RTWMemSecDataParameters "Inherit from model"
580 nsecs "100"
581 fs "100"
582 tsfcn "10*sin(2*pi*10*t)"
583 }
584 Block {
585 BlockType Reference
586 Name "Signal Generator1"
587 Tag "ao"
588 Ports [0, 1]
589 Position [50, 21, 100, 69]
590 AttributesFormatString "%<tsfcn>"
591 SourceBlock "sltpda/AO class/Signal Generator"
592 SourceType "ao"
593 ShowPortLabels "FromPortIcon"
594 SystemSampleTime "-1"
595 FunctionWithSeparateData off
596 RTWMemSecFuncInitTerm "Inherit from model"
597 RTWMemSecFuncExecute "Inherit from model"
598 RTWMemSecDataConstants "Inherit from model"
599 RTWMemSecDataInternal "Inherit from model"
600 RTWMemSecDataParameters "Inherit from model"
601 nsecs "100"
602 fs "100"
603 tsfcn "randn(size(t))"
604 }
605 Block {
606 BlockType Reference
607 Name "ltpda_pwelch"
608 Tag "ltpda_pwelch"
609 Description "Makes a spectral density estimate by calling lt"
610 "pda_pwlech."
611 Ports [1, 1]
612 Position [345, 117, 395, 153]
613 AttributesFormatString "%<win>\\n%<psll>\\n%<nolap>\\n%<nfft>"
614 SourceBlock "sltpda/Signal Processing blocks/ltpda_pwelch"
615 SourceType "ltpda_pwelch"
616 ShowPortLabels "FromPortIcon"
617 SystemSampleTime "-1"
618 FunctionWithSeparateData off
619 RTWMemSecFuncInitTerm "Inherit from model"
620 RTWMemSecFuncExecute "Inherit from model"
621 RTWMemSecDataConstants "Inherit from model"
622 RTWMemSecDataInternal "Inherit from model"
623 RTWMemSecDataParameters "Inherit from model"
624 win "Hanning"
625 nfft "1000"
626 psll "0"
627 nolap "0"
628 }
629 Block {
630 BlockType Reference
631 Name "plot"
632 Tag "plot"
633 Description "Plot an analysis object."
634 Ports [1]
635 Position [450, 119, 480, 151]
636 AttributesFormatString "%<Tag>"
637 SourceBlock "sltpda/AO class/plot"
638 SourceType "plot"
639 ShowPortLabels "FromPortIcon"
640 SystemSampleTime "-1"
641 FunctionWithSeparateData off
642 RTWMemSecFuncInitTerm "Inherit from model"
643 RTWMemSecFuncExecute "Inherit from model"
644 RTWMemSecDataConstants "Inherit from model"
645 RTWMemSecDataInternal "Inherit from model"
646 RTWMemSecDataParameters "Inherit from model"
647 xscale "linear"
648 yscale "linear"
649 }
650 Block {
651 BlockType Reference
652 Name "plus"
653 Tag "plus"
654 Ports [2, 1]
655 Position [275, 116, 310, 149]
656 AttributesFormatString "%<Tag>"
657 SourceBlock "sltpda/math blocks/plus"
658 SourceType "plus"
659 ShowPortLabels "FromPortIcon"
660 SystemSampleTime "-1"
661 FunctionWithSeparateData off
662 RTWMemSecFuncInitTerm "Inherit from model"
663 RTWMemSecFuncExecute "Inherit from model"
664 RTWMemSecDataConstants "Inherit from model"
665 RTWMemSecDataInternal "Inherit from model"
666 RTWMemSecDataParameters "Inherit from model"
667 }
668 Block {
669 BlockType Reference
670 Name "save"
671 Tag "save"
672 Ports [1]
673 Position [450, 48, 490, 82]
674 SourceBlock "sltpda/AO class/save"
675 SourceType "save"
676 ShowPortLabels "FromPortIcon"
677 SystemSampleTime "-1"
678 FunctionWithSeparateData off
679 RTWMemSecFuncInitTerm "Inherit from model"
680 RTWMemSecFuncExecute "Inherit from model"
681 RTWMemSecDataConstants "Inherit from model"
682 RTWMemSecDataInternal "Inherit from model"
683 RTWMemSecDataParameters "Inherit from model"
684 fname "0"
685 }
686 Line {
687 SrcBlock "Signal Generator1"
688 SrcPort 1
689 Points [100, 0; 0, 80]
690 DstBlock "plus"
691 DstPort 1
692 }
693 Line {
694 SrcBlock "Signal Generator"
695 SrcPort 1
696 Points [25, 0; 0, -15]
697 DstBlock "plus"
698 DstPort 2
699 }
700 Line {
701 SrcBlock "plus"
702 SrcPort 1
703 DstBlock "ltpda_pwelch"
704 DstPort 1
705 }
706 Line {
707 SrcBlock "ltpda_pwelch"
708 SrcPort 1
709 DstBlock "plot"
710 DstPort 1
711 }
712 }
713 }