comparison m-toolbox/sltpda/test/testsplit.mdl @ 0:f0afece42f48

Import.
author Daniele Nicolodi <nicolodi@science.unitn.it>
date Wed, 23 Nov 2011 19:22:13 +0100
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children
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-1:000000000000 0:f0afece42f48
1 Model {
2 Name "testsplit"
3 Version 6.6
4 MdlSubVersion 0
5 GraphicalInterface {
6 NumRootInports 0
7 NumRootOutports 0
8 ParameterArgumentNames ""
9 ComputedModelVersion "1.9"
10 NumModelReferences 0
11 NumTestPointedSignals 0
12 }
13 SavedCharacterEncoding "ISO-8859-1"
14 SaveDefaultBlockParams on
15 SampleTimeColors off
16 LibraryLinkDisplay "none"
17 WideLines off
18 ShowLineDimensions off
19 ShowPortDataTypes off
20 ShowLoopsOnError on
21 IgnoreBidirectionalLines off
22 ShowStorageClass off
23 ShowTestPointIcons on
24 ShowViewerIcons on
25 SortedOrder off
26 ExecutionContextIcon off
27 ShowLinearizationAnnotations on
28 ScopeRefreshTime 0.035000
29 OverrideScopeRefreshTime on
30 DisableAllScopes off
31 DataTypeOverride "UseLocalSettings"
32 MinMaxOverflowLogging "UseLocalSettings"
33 MinMaxOverflowArchiveMode "Overwrite"
34 BlockNameDataTip off
35 BlockParametersDataTip off
36 BlockDescriptionStringDataTip off
37 ToolBar on
38 StatusBar on
39 BrowserShowLibraryLinks off
40 BrowserLookUnderMasks off
41 Created "Wed Mar 28 12:20:27 2007"
42 Creator "hewitson"
43 UpdateHistory "UpdateHistoryNever"
44 ModifiedByFormat "%<Auto>"
45 LastModifiedBy "hewitson"
46 ModifiedDateFormat "%<Auto>"
47 LastModifiedDate "Fri Mar 30 10:47:12 2007"
48 ModelVersionFormat "1.%<AutoIncrement:9>"
49 ConfigurationManager "cvs"
50 SimulationMode "normal"
51 LinearizationMsg "none"
52 Profile off
53 ParamWorkspaceSource "MATLABWorkspace"
54 AccelSystemTargetFile "accel.tlc"
55 AccelTemplateMakefile "accel_default_tmf"
56 AccelMakeCommand "make_rtw"
57 AccelVerboseBuild off
58 TryForcingSFcnDF off
59 RecordCoverage off
60 CovPath "/"
61 CovSaveName "covdata"
62 CovMetricSettings "dw"
63 CovNameIncrementing off
64 CovHtmlReporting on
65 covSaveCumulativeToWorkspaceVar on
66 CovSaveSingleToWorkspaceVar on
67 CovCumulativeVarName "covCumulativeData"
68 CovCumulativeReport off
69 CovReportOnPause on
70 ExtModeBatchMode off
71 ExtModeEnableFloating on
72 ExtModeTrigType "manual"
73 ExtModeTrigMode "normal"
74 ExtModeTrigPort "1"
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77 ExtModeTrigDurationFloating "auto"
78 ExtModeTrigHoldOff 0
79 ExtModeTrigDelay 0
80 ExtModeTrigDirection "rising"
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86 ExtModeWriteAllDataToWs off
87 ExtModeArmWhenConnect on
88 ExtModeSkipDownloadWhenConnect off
89 ExtModeLogAll on
90 ExtModeAutoUpdateStatusClock off
91 BufferReuse on
92 ProdHWDeviceType "32-bit Generic"
93 ShowModelReferenceBlockVersion off
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108 StopTime "10.0"
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113 MaxOrder 5
114 ConsecutiveZCsStepRelTol "10*128*eps"
115 MaxConsecutiveZCs "1000"
116 ExtrapolationOrder 4
117 NumberNewtonIterations 1
118 MaxStep "auto"
119 MinStep "auto"
120 MaxConsecutiveMinStep "1"
121 RelTol "1e-3"
122 SolverMode "Auto"
123 Solver "ode45"
124 SolverName "ode45"
125 ZeroCrossControl "UseLocalSettings"
126 AlgebraicLoopSolver "TrustRegion"
127 SolverResetMethod "Fast"
128 PositivePriorityOrder off
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146 SaveOutput on
147 SaveState off
148 SignalLogging on
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150 SaveTime on
151 StateSaveName "xout"
152 TimeSaveName "tout"
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156 OutputTimes "[]"
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206 WriteAfterWriteMsg "UseLocalSettings"
207 WriteAfterReadMsg "UseLocalSettings"
208 AlgebraicLoopMsg "warning"
209 ArtificialAlgebraicLoopMsg "warning"
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211 CheckExecutionContextPreStartOutputMsg off
212 CheckExecutionContextRuntimeOutputMsg off
213 SignalResolutionControl "UseLocalSettings"
214 BlockPriorityViolationMsg "warning"
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216 TimeAdjustmentMsg "none"
217 MaxConsecutiveZCsMsg "error"
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219 InheritedTsInSrcMsg "warning"
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221 MultiTaskDSMMsg "error"
222 MultiTaskCondExecSysMsg "error"
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226 SigSpecEnsureSampleTimeMsg "warning"
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228 IntegerOverflowMsg "warning"
229 Int32ToFloatConvMsg "warning"
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233 ParameterPrecisionLossMsg "warning"
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236 UnnecessaryDatatypeConvMsg "none"
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238 InvalidFcnCallConnMsg "error"
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240 SignalLabelMismatchMsg "none"
241 UnconnectedInputMsg "warning"
242 UnconnectedOutputMsg "warning"
243 UnconnectedLineMsg "warning"
244 SFcnCompatibilityMsg "none"
245 UniqueDataStoreMsg "none"
246 BusObjectLabelMismatch "warning"
247 RootOutportRequireBusObject "warning"
248 AssertControl "UseLocalSettings"
249 EnableOverflowDetection off
250 ModelReferenceIOMsg "none"
251 ModelReferenceVersionMismatchMessage "none"
252 ModelReferenceIOMismatchMessage "none"
253 ModelReferenceCSMismatchMessage "none"
254 ModelReferenceSimTargetVerbose off
255 UnknownTsInhSupMsg "warning"
256 ModelReferenceDataLoggingMessage "warning"
257 ModelReferenceSymbolNameMessage "warning"
258 ModelReferenceExtraNoncontSigs "error"
259 StateNameClashWarn "warning"
260 StrictBusMsg "Warning"
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262 Simulink.HardwareCC {
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267 ProdBitPerInt 32
268 ProdBitPerLong 32
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270 ProdEndianess "Unspecified"
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274 TargetBitPerChar 8
275 TargetBitPerShort 16
276 TargetBitPerInt 32
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281 TargetWordSize 32
282 TargetTypeEmulationWarnSuppressLevel 0
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284 TargetPreprocMaxBitsUint 32
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286 TargetUnknown off
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292 UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange"
293 CheckModelReferenceTargetMessage "error"
294 ModelReferenceNumInstancesAllowed "Multi"
295 ModelReferencePassRootInputsByReference on
296 ModelReferenceMinAlgLoopOccurrences off
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307 Version "1.2.0"
308 SystemTargetFile "grt.tlc"
309 GenCodeOnly off
310 MakeCommand "make_rtw"
311 GenerateMakefile on
312 TemplateMakefile "grt_default_tmf"
313 GenerateReport off
314 SaveLog off
315 RTWVerbose on
316 RetainRTWFile off
317 ProfileTLC off
318 TLCDebug off
319 TLCCoverage off
320 TLCAssert off
321 ProcessScriptMode "Default"
322 ConfigurationMode "Optimized"
323 ConfigAtBuild off
324 IncludeHyperlinkInReport off
325 LaunchReport off
326 TargetLang "C"
327 IncludeBusHierarchyInRTWFileBlockHierarchyMap off
328 IncludeERTFirstTime off
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342 Cell "SignalNamingRule"
343 Cell "ParamNamingRule"
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346 Cell "CustomSymbolStrGlobalVar"
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350 Cell "CustomSymbolStrBlkIO"
351 Cell "CustomSymbolStrTmpVar"
352 Cell "CustomSymbolStrMacro"
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362 PreserveNameWithParent off
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410 Version "1.2.0"
411 TargetFcnLib "ansi_tfl_tmw.mat"
412 TargetLibSuffix ""
413 TargetPreCompLibLocation ""
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415 UtilityFuncGeneration "Auto"
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442 ExtModeStaticAllocSize 1000000
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452 }
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471 FontSize 10
472 FontWeight "normal"
473 FontAngle "normal"
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475 }
476 BlockParameterDefaults {
477 Block {
478 BlockType Demux
479 Outputs "4"
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482 }
483 Block {
484 BlockType Inport
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486 UseBusObject off
487 BusObject "BusObject"
488 BusOutputAsStruct off
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490 SampleTime "-1"
491 DataType "auto"
492 OutDataType "sfix(16)"
493 OutScaling "2^0"
494 SignalType "auto"
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497 LatchByCopyingInsideSignal off
498 Interpolate on
499 }
500 Block {
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510 OutScaling "2^0"
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512 SamplingMode "auto"
513 OutputWhenDisabled "held"
514 InitialOutput "[]"
515 }
516 Block {
517 BlockType SubSystem
518 ShowPortLabels "FromPortIcon"
519 Permissions "ReadWrite"
520 PermitHierarchicalResolution "All"
521 TreatAsAtomicUnit off
522 SystemSampleTime "-1"
523 RTWFcnNameOpts "Auto"
524 RTWFileNameOpts "Auto"
525 RTWMemSecFuncInitTerm "Inherit from model"
526 RTWMemSecFuncExecute "Inherit from model"
527 RTWMemSecDataConstants "Inherit from model"
528 RTWMemSecDataInternal "Inherit from model"
529 RTWMemSecDataParameters "Inherit from model"
530 SimViewingDevice off
531 DataTypeOverride "UseLocalSettings"
532 MinMaxOverflowLogging "UseLocalSettings"
533 }
534 }
535 AnnotationDefaults {
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537 VerticalAlignment "middle"
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546 }
547 LineDefaults {
548 FontName "Helvetica"
549 FontSize 9
550 FontWeight "normal"
551 FontAngle "normal"
552 }
553 System {
554 Name "testsplit"
555 Location [315, 165, 919, 446]
556 Open on
557 ModelBrowserVisibility off
558 ModelBrowserWidth 200
559 ScreenColor "white"
560 PaperOrientation "landscape"
561 PaperPositionMode "auto"
562 PaperType "A4"
563 PaperUnits "inches"
564 TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
565 TiledPageScale 1
566 ShowPageBoundaries off
567 ZoomFactor "100"
568 ReportName "simulink-default.rpt"
569 Block {
570 BlockType Demux
571 Name "Demux"
572 Ports [1, 3]
573 Position [325, 51, 330, 89]
574 BackgroundColor "black"
575 ShowName off
576 Outputs "3"
577 DisplayOption "bar"
578 }
579 Block {
580 BlockType Reference
581 Name "ao5"
582 Tag "ao"
583 Description "Creates an Analysis object from a file."
584 Ports [0, 1]
585 Position [80, 47, 140, 93]
586 AttributesFormatString "%<Tag>\\n%<fname>"
587 SourceBlock "sltpda/AO class/ao1"
588 SourceType "ao"
589 ShowPortLabels "FromPortIcon"
590 SystemSampleTime "-1"
591 FunctionWithSeparateData off
592 RTWMemSecFuncInitTerm "Inherit from model"
593 RTWMemSecFuncExecute "Inherit from model"
594 RTWMemSecDataConstants "Inherit from model"
595 RTWMemSecDataInternal "Inherit from model"
596 RTWMemSecDataParameters "Inherit from model"
597 fname "sltpda/test/data1.txt"
598 }
599 Block {
600 BlockType Reference
601 Name "plot"
602 Tag "plot"
603 Description "Plot an analysis object."
604 Ports [1]
605 Position [405, 27, 465, 83]
606 AttributesFormatString "%<Tag>"
607 SourceBlock "sltpda/AO class/plot"
608 SourceType "plot"
609 ShowPortLabels "FromPortIcon"
610 SystemSampleTime "-1"
611 FunctionWithSeparateData off
612 RTWMemSecFuncInitTerm "Inherit from model"
613 RTWMemSecFuncExecute "Inherit from model"
614 RTWMemSecDataConstants "Inherit from model"
615 RTWMemSecDataInternal "Inherit from model"
616 RTWMemSecDataParameters "Inherit from model"
617 xscale "linear"
618 yscale "linear"
619 }
620 Block {
621 BlockType Reference
622 Name "plot1"
623 Tag "plot"
624 Description "Plot an analysis object."
625 Ports [1]
626 Position [460, 102, 520, 158]
627 AttributesFormatString "%<Tag>"
628 SourceBlock "sltpda/AO class/plot"
629 SourceType "plot"
630 ShowPortLabels "FromPortIcon"
631 SystemSampleTime "-1"
632 FunctionWithSeparateData off
633 RTWMemSecFuncInitTerm "Inherit from model"
634 RTWMemSecFuncExecute "Inherit from model"
635 RTWMemSecDataConstants "Inherit from model"
636 RTWMemSecDataInternal "Inherit from model"
637 RTWMemSecDataParameters "Inherit from model"
638 xscale "linear"
639 yscale "linear"
640 }
641 Block {
642 BlockType Reference
643 Name "plot2"
644 Tag "plot"
645 Description "Plot an analysis object."
646 Ports [1]
647 Position [410, 177, 470, 233]
648 AttributesFormatString "%<Tag>"
649 SourceBlock "sltpda/AO class/plot"
650 SourceType "plot"
651 ShowPortLabels "FromPortIcon"
652 SystemSampleTime "-1"
653 FunctionWithSeparateData off
654 RTWMemSecFuncInitTerm "Inherit from model"
655 RTWMemSecFuncExecute "Inherit from model"
656 RTWMemSecDataConstants "Inherit from model"
657 RTWMemSecDataInternal "Inherit from model"
658 RTWMemSecDataParameters "Inherit from model"
659 xscale "linear"
660 yscale "linear"
661 }
662 Block {
663 BlockType Reference
664 Name "split"
665 Tag "split"
666 Description "Splits an AO into many sub-AOs."
667 Ports [1, 1]
668 Position [215, 49, 280, 91]
669 AttributesFormatString "%<Tag>"
670 SourceBlock "sltpda/AO class/split"
671 SourceType "split"
672 ShowPortLabels "FromPortIcon"
673 SystemSampleTime "-1"
674 FunctionWithSeparateData off
675 RTWMemSecFuncInitTerm "Inherit from model"
676 RTWMemSecFuncExecute "Inherit from model"
677 RTWMemSecDataConstants "Inherit from model"
678 RTWMemSecDataInternal "Inherit from model"
679 RTWMemSecDataParameters "Inherit from model"
680 method "times"
681 splits "1 3 4 5 6.5 9.1"
682 }
683 Line {
684 SrcBlock "ao5"
685 SrcPort 1
686 DstBlock "split"
687 DstPort 1
688 }
689 Line {
690 SrcBlock "split"
691 SrcPort 1
692 DstBlock "Demux"
693 DstPort 1
694 }
695 Line {
696 SrcBlock "Demux"
697 SrcPort 1
698 Points [25, 0; 0, -5]
699 DstBlock "plot"
700 DstPort 1
701 }
702 Line {
703 SrcBlock "Demux"
704 SrcPort 2
705 Points [30, 0; 0, 60]
706 DstBlock "plot1"
707 DstPort 1
708 }
709 Line {
710 SrcBlock "Demux"
711 SrcPort 3
712 Points [20, 0; 0, 125]
713 DstBlock "plot2"
714 DstPort 1
715 }
716 }
717 }